The present invention generally relates to using implantation to form passive layers in organic memory devices. In particular, the present invention relates to CuX passive layers formed by implantation in memory devices containing an organic semiconductor.
The basic functions of a computer and memory devices include information processing and storage. In typical computer systems, these arithmetic, logic, and memory operations are performed by devices that are capable of reversibly switching between two states often referred to as xe2x80x9c0xe2x80x9d and xe2x80x9c1.xe2x80x9d Such switching devices are fabricated from semiconducting devices that perform these various functions and are capable of switching between two states at high speed.
Electronic addressing or logic devices, for instance for storage or processing of data, are made with inorganic solid state technology, and particularly crystalline silicon devices. The metal oxide semiconductor field effect transistor (MOSFET) is one the main workhorses. Much of the progress in making computers and memory devices faster, smaller and cheaper involves integration, squeezing ever more transistors and other electronic structures onto a postage-stamp-sized piece of silicon. A postage-stamp-sized piece of silicon may contain tens of millions of transistors, each transistor as small as a few hundred nanometers. However, silicon-based devices are approaching their fundamental physical size limits.
Inorganic solid state devices are generally encumbered with a complex architecture which leads to high cost and a loss of data storage density. The circuitry of volatile semiconductor memories based on inorganic semiconductor material must constantly be supplied with electric current with a resulting heating and high electric power consumption in order to maintain stored information. Non-volatile semiconductor devices have a reduced data rate and relatively high power consumption and large degree of complexity.
Moreover, as inorganic solid state device sizes decrease and integration increases, sensitivity to alignment tolerances increases making fabrication markedly more difficult. Formation of features at small minimum sizes does not imply that the minimum size can be used for fabrication of working circuits. It is necessary to have alignment tolerances which are much smaller than the small minimum size, for example, one quarter the minimum size.
Scaling inorganic solid state devices raises issues with dopant diffusion lengths. As dimensions are reduced, the dopant diffusion lengths in silicon are posing difficulties in process design. In this connection, many accommodations are made to reduce dopant mobility and to reduce time at high temperatures. However, it is not clear that such accommodations can be continued indefinitely.
Higher doping levels tend to minimize the separation required to prevent punch-through. However, if the voltage change per unit distance is large, further difficulties are created in that a large voltage change per unit distance implies that the magnitude of the electric field is large. An electron traversing such a sharp gradient may be accelerated to an energy level significantly higher than the minimum conduction band energy. Such an electron is known as a hot electron, and may be sufficiently energetic to pass through an insulator, leading to irreversible degradation of a semiconductor device.
Scaling and integration makes isolation in a monolithic semiconductor substrate more challenging. In particular, lateral isolation of devices from each other is difficult in some situations. Another difficulty is leakage current scaling. Yet another difficulty is presented by the diffusion of carriers within the substrate; that is free carriers can diffuse over many tens of microns and neutralize a stored charge.
The following is a summary of the invention in order to provide a basic understanding of some aspects of the invention. This summary is not intended to identify key/critical elements of the invention or to delineate the scope of the invention. Its sole purpose is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later.
The present invention provides organic memory devices containing organic memory cells having a CuX layer formed by implantation into a copper containing electrode. In this context, X is a Group VIB element. Consequently, the thickness of the CuX layer is relatively small and controllable, compared with forming CuX layers by other methods. Moreover, since the CuX layer is formed within an electrode, delamination concerns are mitigated.
The organic memory devices containing the organic memory cells having a CuX layer possess one or more of the following: small size compared to inorganic memory devices, capability to store multiple bits of information, short resistance/impedance switch time, low operating voltages, low cost, high reliability, long life (thousands/millions of cycles), capable of three dimensional packing, associated low temperature processing, light weight, high density/integration, and extended memory retention.
One aspect of the present invention relates to an organic memory device containing at least one organic memory cell made of two electrodes, at least one of which contains copper, with a controllably conductive media between the two electrodes, the controllably conductive media containing an organic semiconductor layer and CuX layer formed by implantation into the copper containing electrode. Other aspects of the present invention relate to making the organic memory devices/cells, using implantation and optional heating/annealing.
To the accomplishment of the foregoing and related ends, the invention comprises the features hereinafter fully described and particularly pointed out in the claims. The following description and the annexed drawings set forth in detail certain illustrative aspects and implementations of the invention. These are indicative, however, of but a few of the various ways in which the principles of the invention may be employed. Other objects, advantages and novel features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the drawings.